The present inventive concept relates to the manufacturing of memory devices. More particularly, the inventive concept relates to methods of manufacturing phase change memory devices.
Nonvolatile memory devices are widely used in many personal and commercial electronics. While some nonvolatile memory devices, such as flash memory devices, use accumulated charge to store data, other memory devices, such as resistive random access memory (RRAM), phase change RAM (PRAM), and magnetic RAM (MRAM) devices, use change in resistivity of a material thereof to store data.
A resistive memory cell generally includes a top electrode, a bottom electrode, and variable resistivity material connected therebetween. The resistive memory cell can be configured so that the resistivity of the variable resistivity material is controlled in response to a voltage that is applied between the top and bottom electrodes.
A PRAM device includes a phase change material layer which functions like the variable resistivity material. The phase change material layer may be formed from a chalcogenide material that includes Ge, Sb, and/or Te (GST). The state or phase of the phase change material layer determines its resistance. For example, when the phase change material layer has crystalline characteristics, its resistance is substantially less than when the phase change material layer has amorphous characteristics.
In response to sufficient heat, the phase of the phase change material layer is changed to change its resistance. The phase remains changed even after the temperature of the phase change material returns to its pre-heated temperature. Current is applied to an electrode of the PRAM device to heat the phase change material a sufficient amount to change its phase. Thus, the phase of the material can be controlled by controlling the level of current and/or duration of current that is applied to the electrode. In this way, the resistance of the phase change material layer in a PRAM device is controlled to set a logic state of the device, and the resistance is sensed to read the logic state as a value.